Texas Instruments TMS320C6712D Manuale Utente Scaricare il pdf (Pagina 74)

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SPRS293A − OCTOBER 2005 − REVISED NOVEMBER 2005

POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443

SYNCHRONOUS-BURST MEMORY TIMING (CONTINUED)

ECLKOUT

CE[3:0]

BE[1:0]

EA[21:2]

ED[15:0]

ARE

/SDCAS/SSADS

†

AOE

/SDRAS/SSOE

†

AWE

/SDWE/SSWE

†

BE1 BE2 BE3 BE4

Q1 Q2 Q3 Q4

†

ARE

/SDCAS/SSADS, AOE/SDRAS/SSOE, and AWE/SDWE/SSWE operate as SSADS, SSOE, and SSWE, respectively, during SBSRAM

accesses.

Figure 28. SBSRAM Read Timing

ECLKOUT

CE[3:0]

BE[1:0]

EA[21:2]

ED[15:0]

ARE

/SDCAS/SSADS

†

AOE/SDRAS/SSOE

†

AWE/SDWE/SSWE

†

BE1 BE2 BE3 BE4

Q1 Q2 Q3 Q4

†

ARE

/SDCAS/SSADS, AOE/SDRAS/SSOE, and AWE/SDWE/SSWE operate as SSADS, SSOE, and SSWE, respectively, during SBSRAM

accesses.

Figure 29. SBSRAM Write Timing

1 2 ... 69 70 71 72 73 74 75 76 77 78 79 ... 101 102

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Texas Instruments TMS320C6712D Manuale Utente Pagina 74

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