Texas Instruments TMS320C642x DSP Manuale Utente Pagina 15
- Pagina / 57
- Indice
- SEGNALIBRI
- User's Guide 1
- 2 SPRUEM4A – November 2007 2
- Submit Documentation Feedback 2
- Contents 3
- Read This First 6
- DDR2 Memory Controller 7
- 1.3 Functional Block Diagram 8
- 2 Peripheral Architecture 9
- 2.1 Clock Control 9
- 2.2 Memory Map 10
- 2.3 Signal Descriptions 11
- 2.4 Protocol Description(s) 12
- Peripheral Architecture 13
- Figure 6. DEAC Command 15
- 2.6 Endianness Support 21
- 2.7 Address Mapping 22
- 2.9 Refresh Scheduling 29
- 2.10 Self-Refresh Mode 29
- 2.11 Reset Considerations 30
- 2.14 Interrupt Support 34
- 2.15 DMA Event Support 34
- 2.16 Power Management 34
- 2.17 Emulation Considerations 35
- 3 Supported Use Cases 36
- Supported Use Cases 37
- Appendix A Revision History 56
- IMPORTANT NOTICE 57
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