Texas-instruments Digital Signal Processor SM320F2812-HT Manuale Utente Pagina 4
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SM320F2812-HT
SGUS062B–JUNE 2009 – REVISED JUNE 2011
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6.21 External Interface (XINTF) Timing ..................................................................................... 114
6.22 XINTF Signal Alignment to XCLKOUT ................................................................................ 118
6.23 External Interface Read Timing ........................................................................................ 119
6.24 External Interface Write Timing ........................................................................................ 120
6.25 External Interface Ready-on-Read Timing With One External Wait State ....................................... 122
6.26 External Interface Ready-on-Write Timing With One External Wait State ........................................ 125
6.27 XHOLD and XHOLDA ................................................................................................... 128
6.28 XHOLD/XHOLDA Timing ............................................................................................... 129
6.29 On-Chip Analog-to-Digital Converter .................................................................................. 131
6.29.1 ADC Absolute Maximum Ratings ........................................................................... 131
6.29.2 ADC Electrical Characteristics Over Recommended Operating Conditions ........................... 132
6.29.3 Current Consumption for Different ADC Configurations (at 25-MHz ADCCLK) ...................... 133
6.29.4 ADC Power-Up Control Bit Timing .......................................................................... 134
6.29.5 Detailed Description .......................................................................................... 135
6.29.5.1 Reference Voltage ................................................................................ 135
6.29.5.2 Analog Inputs ..................................................................................... 135
6.29.5.3 Converter .......................................................................................... 135
6.29.5.4 Conversion Modes ............................................................................... 135
6.29.6 Sequential Sampling Mode (Single Channel) (SMODE = 0) ............................................ 135
6.29.7 Simultaneous Sampling Mode (Dual-Channel) (SMODE = 1) .......................................... 137
6.29.8 Definitions of Specifications and Terminology ............................................................. 138
6.29.8.1 Integral Nonlinearity .............................................................................. 138
6.29.8.2 Differential Nonlinearity .......................................................................... 138
6.29.8.3 Zero Offset ........................................................................................ 138
6.29.8.4 Gain Error ......................................................................................... 138
6.29.8.5 Signal-to-Noise Ratio + Distortion (SINAD) ................................................... 138
6.29.8.6 Effective Number of Bits (ENOB) ............................................................... 138
6.29.8.7 Total Harmonic Distortion (THD) ............................................................... 138
6.29.8.8 Spurious Free Dynamic Range (SFDR) ....................................................... 138
6.30 Multichannel Buffered Serial Port (McBSP) Timing ................................................................. 139
6.30.1 McBSP Transmit and Receive Timing ...................................................................... 139
6.30.2 McBSP as SPI Master or Slave Timing .................................................................... 142
6.31 Flash Timing .............................................................................................................. 146
6.31.1 Recommended Operating Conditions ...................................................................... 146
7 Mechanical Data .............................................................................................................. 148
Revision History ....................................................................................................................... 149
4 Contents Copyright © 2009–2011, Texas Instruments Incorporated
- Data Manual 1
- Contents 2
- List of Figures 5
- List of Tables 7
- SM320F2812-HT 10
- Digital Signal Processor 11
- Input Analog Voltage ADCLO 58
- McBSP clock rate CLKG 67
- 1 CLKGDIV 67
- SeeFigure6-8 90
- SeeNote A 130
- SeeNoteB 130
- (SINAD 1.76) 138
- PACKAGE OPTION ADDENDUM 150
- IMPORTANT NOTICE 153
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